Well after the development of sophisticated digital signal-processing techniques, the processing of sound signals continued, and in fact still continues, to be dominated by analog processing systems. More than 15 years ago, the theoretical groundwork was laid for providing sound signals, through digital processing techniques, with reverberation effects. See M. R. Schroeder and B. F. Logan, "`Colorless` Artificial Reverberation", Journal of the Audio Engineering Society, July, 1961, vol. 9, no. 3, pp. 192-197, and M. R. Schroeder, "Natural Sounding Artificial Reverberation", Journal of the Audio Engineering Society, July, 1962, vol. 10, no. 3, pp. 219-223. This work concluded that through the use of a multiplier, a signal delaying element and an adder, a sound signal transmitted in a totally non-reverberating environment could be digitally processed to provide it with realistic reverberation effects. For example, such a signal might be processed to sound as though its source were in a room having a variable size and having walls (and perhaps contents) with varying absorption characteristics. In this regard, the general rate of decay of the initial sound and successive echoes is generally characterized as a reverberation time; the timing of echo effects might be generally characterized as a room size variable; and the absorption characteristics which typically result in the decay of higher frequency signals faster than lower frequency signals, might be characterized as a high frequency damping variable.
Somewhat of an appreciation for this theoretical work may be garnered by considering that if a sound signal, e.g., a person singing, is directed at a wall, a person standing next to the singer will, after an interval dependent on the distance of the wall from the singer, hear what the singer is currently singing as well as a softer version of what was being sung at the start of the interval. The softer version will also differ in other respects, depending on the characteristics of the wall (and room contents). Thus, in general, the higher frequency components of the singing will be softer in the echo signal than the lower frequency components. Implementing this effect then generally calls for the addition of a delayed variation of the original signal to the original signal. A general softening of the delayed signal can, for example, be produced by a multiplication of the original signal by a factor that is less than one. Similarly, an increased softening of the higher frequencies in the delayed signal can conveniently be implemented by dividing the generally delayed, softened signal into two components, both further softened and one additionally delayed. This illustration, although rather simple and thus indicative of an elemental environment, indicates very well how a more complicated environment (e.g., a complete room) can be simulated by computation apparatus which includes a multiplier, an adder and a delay element.
Digital processing is in general qualitatively superior to analog processing as a result of the fact that once the signal to be processed is in a digitally-represented form it is not subject to the type of signal degradation that occurs in analog processing. Thus, the signal is represented as a group of digits which are then processed in that form rather than as a "physical" variable (e.g., a voltage) subject to the type of distortion inherent in analog processing techniques. An experimental system, grounded in the theoretical work, and directed at exploiting this superiority, was implemented more than 10 years after the theoretical work was done. See Barry A. Blesser, Karlo Baeder and Ralph Zaorski, "A Real-Time Digital Computer for Simulating Audio Systems", Journal of the Audio Engineering Society, November, 1975, vol. 23, no. 3, pp. 698-707. A particular commercial implementation was also developed, as indicated by catalog material for the "EMT 250 Electronic Reverberator Unit With Digital Processing", e.g. dated June, 1976, and Hugh Ford, "EMT 250 Electronic Reverberator Unit", Studio Sound, April, 1977, pp, 52, 54 and 56. The aforementioned superiority is, however, conventionally accompanied by recognized, significant disadvantages:
"The digital domain offers audio engineers the possibility of designing systems whose quality is significantly better than the analog counterpart. However, in exchange for this benefit the audio engineer acquires higher cost, extra difficulty in design, experimentation, construction, and evaluation . . . " Blesser et al. at P. 706.
These disadvantages, for a large majority of applications, are traditionally viewed as overriding the advantages over such counterparts.
The present system addresses these disadvantages by incorporating structure representing a divergence from conventional digital signal-processing apparatus, as conventionally applied to the digital processing of sound signals (or signals representative thereof). This structure is, however, also broadly applicable to general signal-processing systems.
More particularly, the present invention incorporates in a signal-processing system, a first storage means for storing control information in storage locations which are addressable in predetermined sequences and a second storage means for storing operand information in storage locations which are addressable in variable sequences. The control information controls the operations performed by computation means incorporated in the system, and the operand information provides operands which are operated on by the computation means along with the signal which is processed. The invention in general eliminates the need for "JUMP" or "BRANCHING" instructions, i.e. the general dependence of an addressing sequence for an information storage element for storing control information on previously addressed information in that storage element or on external information, and results in substantial economic savings.
A more particular feature of the present invention makes the variable addressing sequences of storage locations in the second storage means in part dependent upon information in storage locations in the first storage means. In addition, a more general aspect of the present invention incorporates the aforementioned storage means structure and addressing, without reference to the types of computation information in the two storage means.
It is evident that a system which receives analog signals, e.g. representative of sound signals, for digital processing, requires an analog to digital conversion system to convert an analog input signal to the digital domain and a digital to analog conversion system to convert digital signals representative of the processed analog signal, back to the analog domain. The actual converters, i.e., the devices that accept a signal in one domain and convert it to the other domain, generally are more difficult and costly to realize as the number of digits they provide or accept, increase. Due to this fact, "ranging" techniques have been developed to provide advantages associated with more digits without increasing the number of digits which a converter element provides or receives.
By way of illustration, one might suppose that an analog to digital converter element in an analog to digital conversion system will provide three binary output digits representative of input voltage values of an analog signal, that are between 0 and 7 volts. However, an analog signal representative of a sound signal varies between 0 and 28 volts. According to this system, the bits or digits and the analog values they represent might be as follows:
______________________________________ Value Binary Representation ______________________________________ 0 000 1 001 2 010 3 011 4 100 5 101 6 110 7 111 ______________________________________
According to this system, it might further be assumed that 0.1, 0.2, 0.3, and 0.4 might be represented by 000, and 0.5, 0.6, 0.7, 0.8, and 0.9 as 001, with the same rounding effect operable between each whole number.
To illustrate the application of ranging, one might then conventionally consider a received voltage between 0 and 7 volts as falling within a first value range having a binary representation of 00, a received voltage of 7 to 14 volts as falling in a second range having a binary representation of 01; and a received voltage of 14 to 28 volts as falling in a third range represented by 10. These ranges might then conventionally indicate that signal values in the first range are acceptable to the converter element (i.e., are acceptable if divided by 2.sup.0 prior to transmittal to the converter element); signal values in the second range must be divided by 2.sup.1 (2) prior to transmittal to the converter element; and signal values in the third range must be divided by 2.sup.2 (4) prior to such transmittal. Through this illustration, it may be appreciated that the two ranging bits along with the three output bits from the converter element ("converter bits") together digitally-represent a voltage value between 0 and 28 volts. Assuming one subsequently desired to perform computations (e.g., multiplications and additions), utilizing the digital representation, such operations might generally entail significant complications as a result of the essentially independent sets of bits required to represent a voltage value. See, e.g., John P. Meyers, "High Quality Professional Recording Using New Digital Techniques", Preprint No. 867 (J- 3) of the Audio Engineering Society (1972). Some conventional apparatus may attempt to address complications of this sort. See J. Stanley Kriz, "An Audio Analog-Digital-Analog Conversion System", Preprint No. 1142(L-2) of the Audio Engineering Society (1976); and catalog material for the "EMT Electronic Reverberator with Digital Processing", and Ford, supra.
Further along these lines, in conjunction with multipliers and adders, as well as other applications, it has become convenient and economical to use a 2's complement binary number system. The application of this system to ranging in analog to digital conversions might be illustrated, along the above lines, as follows.
It may, first of all, be assumed that the converter element is able to accept, for conversion, voltage values between -1 and +1 volts, and can then convert such values to a three-bit binary representation, one bit of which is a sign bit. According to the standard 2's complement number system, and again assuming rounding (quantization) along the lines previously indicated, the correlation between the received voltage "V" and the resulting 2's complement digital representation would be as follows:
______________________________________ Value Range of Values Binary Representation ______________________________________ +3/4 (5/8 .ltoreq. V &lt; 7/8) -011 +1/2 (3/8 .ltoreq. V &lt; 5/8) -010 +1/4 (1/8 .ltoreq. V &lt; 3/8) -001 0 (-1/8 .ltoreq. V &lt; 1/8) -000 -1/4 (-3/8 .ltoreq. V &lt; -1/8) -111 -1/2 (-5/8 .ltoreq. V &lt; -3/8) -110 -3/4 (-7/8 .ltoreq. V &lt; -5/8) -101 -1 (-1 .ltoreq. V &lt; -7/8) -100 ______________________________________
Then, for example, the 001 is interpreted as having a "+" sign (underlined digit) and an absolute value of (0 .times.2.sup.-1)+(1.times.2.sup.-2)=1/4, thus a completely expressed value of +1/4. Similarly, the 110 is then interpreted as having a "-" sign and an absolute value of 1-((1.times.2.sup.-1)+(0.times.2.sup.-2))=1-1/2, thus a completely expressed value of -1/2.
Somewhat of an intuitive appreciation for the advantages of a 2's complement representation may be garnered from the fact that it is generally considered disadvantageous in digital processing systems to include elements which directly perform subtractions, and advantageous to employ in place thereof elements which perform additions. A 2's complement representation can then, among other things, easily provide for the use of an adder for both addition and subtraction.
Applying ranging to the above 2's complement illustration, and, as shown in the chart, assuming rounding (quantization) along the lines previously indicated (e.g.,+1/8 through (any value) less than +3/8 is represented as 001, -1/8 through (any value) less than +1/8 is represented as 000, +5/8 through (any value) less than +7/8 is represented as 011, etc.), the application of ranging to a 2's complement numbering system and analog to digital converter element might conventionally be generally along the following lines.
First, define a first range for signals having a value greater than or equal to +7/16 volt, and less than +7/8 volt, or less than or equal to -7/16 volt and greater than -7/8 volt (also less than -7/8 volt and greater than -1 volt). This range would be indicative of no multiplication (or multiplication by one) before transmittal to the converter element, and e.g., represented by the two digits 00. Similarly, a second range, indicative of a multiplication by 2.sup.1 (2) and represented by, e.g., 01, would be applicable to signals having a value greater than or equal to +7/32 volt and less than +7/16 volt, or less than or equal to -7/32 volt and greater than -7/16 volt. A third range, indicative of a multiplication by four and, e.g. represented by 10 would then apply to signals having a value greater than -7/32 volt and less than +7/32 volt. This is, of course, merely illustrative.
Somewhat along the lines illustrated for the standard binary ranging, it is evident that in the absence of the 2's complement ranging, for example, input values of 1/32 and 1/16 volt would both be converted to 000. However, with the ranging, extrapolated to include a multiplication by eight for a fourth range represented by the ranging bits 11, 1/32 volt would be multiplied by eight and represented by the ranging bits 11 and the three digits constituting the 2's complement representation for +1/4, or 001. Similarly, 1/16 volt would be represented by the same ranging digits and 010. Thus, the ranging preserves information that would otherwise be lost. Though incorporating advantages for certain applications over a conventional binary ranging system, the 2's complement ranging, as illustrated, also presents the problem of handling two essentially distinct groups of digits representative of a single value.
In the context of analog to digital conversion, conversion aspects of the present invention (applicable to any digital representation, e.g. binary, decimal) include structure for integrating the two essentially independent sets of digits. Further, this structure integrates them into a set of digits which in fact may accurately, without any accompanying information, represent the value received before any ranging operations (e.g., multiplications) or conversion. This structure accomplishes this integrated representation through a manipulation including a shifting of digits in a plurality of adjoining digit positions to other positions, subject to the control of the ranging information (bits). The shifted positions, when compared to the unshifted positions, represent a shift of the digits a number of positions corresponding to a dividing factor. This dividing factor is in fact indicative of the multiplication factor represented by the ranging bits, and results in the aforementioned integrated representation. Particular structure which accomplishes the manipulation is particularly adapted to function in a 2's complement binary number system. Further, in a digital to analog conversion system, analogous shifting structure accomplishes an analogous result. A particular component, in integrated circuit form, which is termed a "Four-Bit Shifter" and sold under the designation "Am25S10", as described in specification material related thereto, and application notes by John R. Mick, entitled "Am25S10 Four-Bit Shifter", is, for example, one component that is particularly useful in implementing the shifting structure.
Another problem which is introduced by ranging may be appreciated by reference to matters which have already been discussed. Focusing on ranging in a 2's complement environment and with respect to analog to digital conversion, it is evident that inaccuracies in the multiplication process may introduce unintended errors into the ranging process. Such errors would normally be introduced, to at least some extent, by nonlinearities in electronic devices. By way of a simplified illustration, a resistance equal to 100 ohms which has a voltage drop across it equal to 1 volt for a current of 0.01 amperes, instead of having a voltage of 2 volts for 0.02 amperes, might due to its nonlinearities, have a voltage of 2.1 volts. With respect to the processing of signals representative of sound signals and analog to digital conversion, these effects will normally be noticed by a listener if there are changes in range, in rapid succession. Although such changes in rapid succession would not normally be restricted where a ranging multiplication factor is decreasing, since a value received by the converter element may otherwise become too large for the range of the element, restrictions in such rapid changes wherein these changes would otherwise result in, for example, successions of increasing or alternating multiplication factors, can be implemented. In this regard, the sacrificing of the advantages of ranging during a period of approximately 100 milliseconds will generally not be noticed by the human ear due to a physiological phenomenon known as the "finite recovery time" of human hearing. See Francis F. Lee and David Lipschutz, "Floating Point Encoding for Transcription of High Fidelity Audio Signals", Preprint No. 1190(L-1) of the Audio Engineering Society (1976). Generally, this recovery time makes the human ear insensitive to a relatively softer sound for approximately 100 milliseconds after a relatively louder sound.
As indicated previously, conversion aspects of the present invention which have been referred to, incorporate structure relating to the implementation of ranging in a digital to analog conversion system, as well as an analog to digital conversion system. An additional conversion aspect incorporates timing structure into a digital to analog conversion system which accomplishes restrictions in range changes, somewhat along the lines indicated above, with reference to an analog to digital system.